← Rajeshkanna Viswanathan
Personal project · Simulation

Hardware-in-the-Loop flight sim

JSBSim · SIL / HIL · 6-DOF
Processor hardware macro

Closed-loop validation of the flight-control software against a JSBSim flight-dynamics model, with MIL, SIL and HIL to test control behaviour before it flies.

The idea is to catch control-behaviour problems in simulation, where they are cheap, long before anything is risked on real hardware in the air.

Key results

Tech

JSBSim · SIL / HIL · 6-DOF

A personal project by Rajeshkanna Viswanathan. Back to home · Get in touch